(1) Field of the Invention
The present invention relates to a tape carrier package semiconductor device (to be referred to hereinafter as a TCP semiconductor device) in which a semiconductor chip is packed in a form of a tape carrier package.
(2) Description of the Related Art
FIG. 1A is a plan view showing a pattern of a carrier tape for a prior art TCP semiconductor device. FIG. 1B is a sectional view taken on 20-20 in FIG. 1A of a TCP semiconductor device using the carrier tape in which the carrier tape is sealed with a solventless type resin. In FIGS. 1A and 1B, the semiconductor device is composed of a semiconductor chip 12, inner leads 13, a carrier tape 15 with a device hole 11 and a sealing resin 16.
In the prior art TCP semiconductor device, as shown in FIG. 1A, the inner leads 13 are bonded to unillustrated pads on the semiconductor chip 12. Thereafter, the sealing resin 16 is applied thereon. The resin applied flows down due to the weight thereof through the clearance formed between the edge of the device hole 11 and the edge of the semiconductor chip 12 toward the opposite side of the resin-application.
The number of pads (not shown) provided on different sides of the semiconductor chip 12 rarely correspond with each other and the number of inner leads 13 connected on the different sides are not the same, as shown in FIG. 1A. Further, each inner lead 13 generally has a different width from others. Therefore, the space allowing the resin to flow out differs for each side.
This difference in the spaces, allowing the resin to flow out directly, causes a difference in flowed resin quantity, making uneven the feature on the backside of the application after the resin is cured. More explicitly, as shown in FIG. 1B, the sealing resin 16 flows out in bulk through wide clearances between sparsely provided inner leads 13 while the resin flows out in a small amount through the narrow clearances between densely provided inner leads 13. The flow-out amount of the sealing resin 16 changes depending upon the total clearance area between inner leads 13 bonded to pads (not shown) on each side of the semiconductor chip 12 if the sealing resin 16 has a constant resin-leveling property which represents easiness of flowing of the sealing resin 16 and the spaces of the device hole 11 is equally allotted on different sides.
For the reasons described above, it rarely happens that the sealing resin 16 is formed uniformly on the backside of the application on the pattern of the carrier tape 15 shown in FIG. 1A. That is, a large amount of resin flowed out along the sides having greater spaces, therefore, bulky resin portions are formed in those areas on the backside of the application, causing adverse effects for making the TCP semiconductor device compact and thin. On the other hand, the places where a less amount of the resin is provided, not only bring about a problem of the size but also degradation in strength and moisture resistance etc. of the device.
Several methods have been proposed to deal with the problem described above. That is, in the prior art, slits are provided on the resin flow-out side for holding back the sealing resin; a resin having thixotropy is applied to form a dam for preventing the flow of the resin; a frame for holding back the resin is provided to control the flow of the resin; and the viscosity of the resin is adjusted by controlling the amount and size of a filler added to control the resin flow.
Further, it is disclosed in Japanese Utility Model Application Laid-open Sho 53 No. 103,659 that in order to prevent leakage of the resin, cantilevered projected portions are provided for the inner leads on the backside thereof in the clearance between the edges of the semiconductor chip and the device hole so as to block the portions where no inner lead exists.
Any of the above methods, however, requires an increased number of steps resulting in a lower of yield and raising the cost of the final product.
In the means described in Japanese Utility Model Application Laid-open Sho 53 No. 103,659 in which cantilevered projected portions are provided, the projected portions are extended to the edge of the device hole so that degrees of flexure differ between lead portions with projected portions and lead portions with no projected portion. This structure may cause the resin in the lead portions to crack. The situation will be described referring to a partially enlarged view in FIG. 2. Since the amount of the flowed resin is controlled by varying the widths of inner leads 13, some inner leads have a greater width, other inner leads have a smaller width in the portions where each inner lead 13 is connected to the edge of the carrier tape 15. Accordingly, the flexibility or rigidity distribution of inner leads 13 becomes unequal. As a result, stresses which are caused when the semiconductor chip 12 is bonded tend to concentrate on particular points (portions encircled by broken lines in FIG. 2), possibly breaking the inner leads 13. Therefore, this configuration is not a favorable one.
As an improved method from the above prior art, based on the size of the clearance of the device hole 11 in which inner leads 13 are sparsely provided, the size of the clearance of the device hole 11 in which inner leads 13 are densely provided is determined so that the amount of the resin flowing out may be equal in both the areas. This method improves the controllability of the resin range thereby eliminating the problem relating the size of the product. However, each model of so constructed devices requires a dedicated cutout die for forming a specific device hole 11, resulting in increased cost for producing the die for each model.